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* Library of National Semiconductor Corp. CMOS OP-AMP * Macromodels. Version 2.5 * * This library of macromodels is being supplied to users as * an aid to circuit designs. While it reflects reasonably * close similarity to the actual device in terms of * performance, it is not suggested as a replacement for * breadboarding. Simulation should be used as a supplement * to traditional lab testing. * * Users should very carefully note the following factors * regarding these models: * * -- Model performance in general will reflect typical * baseline specs for a given device, and certain aspects of * performance may not be modeled fully. * * -- While reasonable care has been taken in their * preparation, we cannot be responsible for correct * application on any and all computer systems. * * -- Model users are hereby notified that these models are * supplied "as is", with no direct or implied responsibility * on the part of National Semiconductor for their operation * within a customer circuit or system. Further, National * Semiconductor reserves the right to change these models * without prior notice. * * -- In all cases, the current data sheet information for a * given real device is your final design guideline, and is * the only actual performance guarantee. For further * technical information, refer to individual device data * sheets. * * Note: The current models presently do not simulate * temperature or noise effects. * * Your feedback and suggestions on these (and future) models * will be appreciated. * * Models developed by: * David Hindi * National Semiconductor For information on the models, contact: * 2900 Semiconductor Dr. Linear Applications * Santa Clara, CA 95052 (408) 721-3877 * M/S C2500 * FAX (408) 721-7321 For ordering information, contact: * Customer Response Center * (408) 721-4902 * --------------------------------------------------------- *////////////////////////////////////////////////////////// *LMC660AM/AI/C CMOS Quad OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC660 1 2 99 50 41 * *Features: *Operates from single supply *Rail-to-rail output swing *Ultra low input current = 40fA *Slew rate = 1.1V/uS * *NOTE: Model is for single device only and simulated * supply current is 1/4 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 20U M1 5 2 4 99 MOSFET R3 5 50 5.2696K M2 6 7 4 99 MOSFET R4 6 50 5.2696K *Fp2=7.5 MHz C4 5 6 2.0135P CI1 1 0 2P CI2 2 0 2P DP1 1 99 DA DP2 50 1 DX DP3 2 99 DX DP4 50 2 DB G0 98 9 6 5 23.721E-3 R0 98 9 1K *For accurate Ib , set GMIN<=1E-16 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 305U *^Quiescent current EOS 7 1 POLY(1) 16 49 1E-3 1 *Offset voltage.........^ R8 99 49 100K R9 49 50 100K * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 9 49 1E-3 R12 98 15 1K C5 98 15 11.967P * ************POLE/ZERO STAGE************* * *Fp=1 MHz, Fz= 2.6MHz G5 98 18 15 49 1E-3 R14 98 18 1K R15 98 19 625 C6 19 18 97.94P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=20 KHz G4 98 16 POLY(2) 1 49 2 49 0 3.5397E-8 3.5397E-8 L2 98 17 7.958M R13 17 16 1K * **************OUTPUT STAGE************** * EH 99 98 99 49 1 G1 98 29 18 49 8.253E-6 R5 98 29 510.8MEG D1 8 99 DX V2 8 29 1.363 D2 50 10 DX V3 29 10 1.363 F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 11.765E-3 R16 38 40 2.688K D5 30 99 DX V4 30 40 .77 D6 50 31 DX V5 40 31 .77 *Fp1=.5294 Hz C3 29 39 18.182P R6 39 40 1K R17 40 41 47 * ***************MODELS USED************** * .MODEL DA D(IS=5E-14) .MODEL DB D(IS=4E-14) .MODEL DX D(IS=1E-14) .MODEL MOSFET PMOS(VTO=-2.35 KP=1.801E-3) .ENDS *////////////////////////////////////////////////////////// *LPC660AM/AI/I CMOS Quad OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LPC660 1 2 99 50 41 * *Features: *Operates from single supply *Rail-to-rail output swing *Ultra low input current = 40fA *Slew rate = .11V/uS * *NOTE: Model is for single device only and simulated * supply current is 1/4 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 1U M1 5 2 4 99 MOSFET R3 5 50 37.65K M2 6 7 4 99 MOSFET R4 6 50 37.65K *Fp2=345 KHz C4 5 6 6.126P CI1 1 0 2P CI2 2 0 2P DP1 1 99 DA DP2 50 1 DX DP3 2 99 DX DP4 50 2 DB G0 98 9 6 5 66.402E-3 R0 98 9 1K *For accurate Ib , set GMIN<=1E-16 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 41U *^Quiescent current EOS 7 1 POLY(1) 16 49 1E-3 1 *Offset voltage.........^ R8 99 49 2.5MEG R9 49 50 2.5MEG * ************ZERO/POLE STAGE************* * *Fz=2.5 MHz, Fp= 5.6MHz G2 98 13 9 49 1E-3 R10 98 14 1.24K R11 14 13 1K L1 98 14 35.24U * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 13 49 1E-3 R12 98 15 1K C5 98 15 11.967P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=2 KHz G4 98 16 POLY(2) 1 49 2 49 0 3.5397E-8 3.5397E-8 L2 98 17 79.58M R13 17 16 1K * **************OUTPUT STAGE************** * EH 99 98 99 49 1 G1 98 29 15 49 4.1265E-7 R5 98 29 1.154G D1 8 99 DX V2 8 29 1.363 D2 50 10 DX V3 29 10 1.363 F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 11.765E-3 R16 38 40 2.688K D5 30 99 DX V4 30 40 .77 D6 50 31 DX V5 40 31 .77 *Fp1=.465 Hz C3 29 39 9.091P R6 39 40 1K R17 40 41 53.9 * ***************MODELS USED************** * .MODEL DA D(IS=5E-14) .MODEL DB D(IS=4E-14) .MODEL DX D(IS=1E-14) .MODEL MOSFET PMOS(VTO=-2.35 KP=7.054728E-4) .ENDS *////////////////////////////////////////////////////////// *LMC662AM/AI/C CMOS Dual OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC662 1 2 99 50 41 * *Features: *Operates from single supply *Rail-to-rail output swing *Ultra low input current = 40fA *Slew rate = 1.1V/uS * *NOTE: Model is for single device only and simulated * supply current is 1/2 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 20U M1 5 2 4 99 MOSFET R3 5 50 5.2696K M2 6 7 4 99 MOSFET R4 6 50 5.2696K *Fp2=7.5 MHz C4 5 6 2.0135P CI1 1 0 2P CI2 2 0 2P DP1 1 99 DA DP2 50 1 DX DP3 2 99 DX DP4 50 2 DB G0 98 9 6 5 23.721E-3 R0 98 9 1K *For accurate Ib , set GMIN<=1E-16 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 305U *^Quiescent current EOS 7 1 POLY(1) 16 49 1E-3 1 *Offset voltage.........^ R8 99 49 100K R9 49 50 100K * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 9 49 1E-3 R12 98 15 1K C5 98 15 11.967P * ************POLE/ZERO STAGE************* * *Fp=1 MHz, Fz= 2.6MHz G5 98 18 15 49 1E-3 R14 98 18 1K R15 98 19 625 C6 19 18 97.94P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=20 KHz G4 98 16 POLY(2) 1 49 2 49 0 3.5397E-8 3.5397E-8 L2 98 17 7.958M R13 17 16 1K * **************OUTPUT STAGE************** * EH 99 98 99 49 1 G1 98 29 18 49 8.253E-6 R5 98 29 510.8MEG D1 8 99 DX V2 8 29 1.363 D2 50 10 DX V3 29 10 1.363 F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 11.765E-3 R16 38 40 2.688K D5 30 99 DX V4 30 40 .77 D6 50 31 DX V5 40 31 .77 *Fp1=.5294 Hz C3 29 39 18.182P R6 39 40 1K R17 40 41 47 * ***************MODELS USED************** * .MODEL DA D(IS=5E-14) .MODEL DB D(IS=4E-14) .MODEL DX D(IS=1E-14) .MODEL MOSFET PMOS(VTO=-2.35 KP=1.801E-3) .ENDS *////////////////////////////////////////////////////////// *LPC662AM/AI/I CMOS Dual OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LPC662 1 2 99 50 41 * *Features: *Operates from single supply *Rail-to-rail output swing *Ultra low input current = 40fA *Slew rate = .11V/uS * *NOTE: Model is for single device only and simulated * supply current is 1/2 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 1U M1 5 2 4 99 MOSFET R3 5 50 37.65K M2 6 7 4 99 MOSFET R4 6 50 37.65K *Fp2=345 KHz C4 5 6 6.126P CI1 1 0 2P CI2 2 0 2P DP1 1 99 DA DP2 50 1 DX DP3 2 99 DX DP4 50 2 DB G0 98 9 6 5 66.402E-3 R0 98 9 1K *For accurate Ib , set GMIN<=1E-16 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 41U *^Quiescent current EOS 7 1 POLY(1) 16 49 1E-3 1 *Offset voltage.........^ R8 99 49 2.5MEG R9 49 50 2.5MEG * ************ZERO/POLE STAGE************* * *Fz=2.5 MHz, Fp= 5.6MHz G2 98 13 9 49 1E-3 R10 98 14 1.24K R11 14 13 1K L1 98 14 35.24U * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 13 49 1E-3 R12 98 15 1K C5 98 15 11.967P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=2 KHz G4 98 16 POLY(2) 1 49 2 49 0 3.5397E-8 3.5397E-8 L2 98 17 79.58M R13 17 16 1K * **************OUTPUT STAGE************** * EH 99 98 99 49 1 G1 98 29 15 49 4.1265E-7 R5 98 29 1.154G D1 8 99 DX V2 8 29 1.363 D2 50 10 DX V3 29 10 1.363 F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 11.765E-3 R16 38 40 2.688K D5 30 99 DX V4 30 40 .77 D6 50 31 DX V5 40 31 .77 *Fp1=.465 Hz C3 29 39 9.091P R6 39 40 1K R17 40 41 53.9 * ***************MODELS USED************** * .MODEL DA D(IS=5E-14) .MODEL DB D(IS=4E-14) .MODEL DX D(IS=1E-14) .MODEL MOSFET PMOS(VTO=-2.35 KP=7.054728E-4) .ENDS *////////////////////////////////////////////////////////// *LMC6041/A CMOS Single Micropower OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC6041 1 2 99 50 41 * *Features: *Operates from single supply *Rail-to-rail output swing *Ultra low input current = 2fA *Slew rate = .02V/uS *Low supply current = 14uA * *NOTE: Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 1U M1 5 2 4 99 MOSFET R3 5 50 69.198K M2 6 7 4 99 MOSFET R4 6 50 69.198K *Fp2=100 KHz C4 5 6 11.5P CI1 1 0 2P CI2 2 0 2P DP1 1 99 DA DP2 50 1 DX DP3 2 99 DX DP4 50 2 DB G0 98 9 6 5 36.128E-3 R0 98 9 1K *For accurate Ib , set GMIN<=1E-17 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 11U *^Quiescent current EOS 7 1 POLY(1) 16 49 1E-3 1 *Offset voltage.........^ R8 99 49 1.25MEG R9 49 50 1.25MEG * ***************POLE STAGE*************** * *Fp=2.7 MHz G2 98 13 9 49 1E-3 R10 98 13 1K C5 98 13 58.8463P * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 13 49 1E-3 R12 98 15 1K C6 98 15 11.967P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=800 Hz G4 98 16 POLY(2) 1 49 2 49 0 8.891397E-8 8.891397E-8 L2 98 17 198.944M R13 17 16 1K * **************OUTPUT STAGE************** * EH 99 98 99 49 1 G1 98 29 15 49 4.1265E-7 R5 98 29 2.12115G D1 8 99 DX V2 8 29 .63 D2 50 10 DX V3 29 10 .63 F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 8.163E-3 R16 38 40 3.874K D5 30 99 DX V4 30 40 .77 D6 50 31 DX V5 40 31 .77 *Fp1=.046 Hz C3 29 39 50P R6 39 40 1K R17 40 41 83.6 * ***************MODELS USED************** * .MODEL DA D(IS=3E-15) .MODEL DB D(IS=2E-15) .MODEL DX D(IS=1E-15) .MODEL MOSFET PMOS(VTO=-2.35 KP=2.0884E-4) .ENDS *////////////////////////////////////////////////////////// *LMC6042/A CMOS Dual Micropower OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC6042 1 2 99 50 41 * *Features: *Operates from single supply *Rail-to-rail output swing *Ultra low input current = 2fA *Slew rate = .02V/uS *Low supply current = 14uA * *NOTE: Model is for single device only and simulated * supply current is 1/2 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 1U M1 5 2 4 99 MOSFET R3 5 50 69.198K M2 6 7 4 99 MOSFET R4 6 50 69.198K *Fp2=100 KHz C4 5 6 11.5P CI1 1 0 2P CI2 2 0 2P DP1 1 99 DA DP2 50 1 DX DP3 2 99 DX DP4 50 2 DB G0 98 9 6 5 36.128E-3 R0 98 9 1K *For accurate Ib , set GMIN<=1E-17 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 11U *^Quiescent current EOS 7 1 POLY(1) 16 49 1E-3 1 *Offset voltage.........^ R8 99 49 1.25MEG R9 49 50 1.25MEG * ***************POLE STAGE*************** * *Fp=2.7 MHz G2 98 13 9 49 1E-3 R10 98 13 1K C5 98 13 58.8463P * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 13 49 1E-3 R12 98 15 1K C6 98 15 11.967P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=800 Hz G4 98 16 POLY(2) 1 49 2 49 0 8.891397E-8 8.891397E-8 L2 98 17 198.944M R13 17 16 1K * **************OUTPUT STAGE************** * EH 99 98 99 49 1 G1 98 29 15 49 4.1265E-7 R5 98 29 2.12115G D1 8 99 DX V2 8 29 .63 D2 50 10 DX V3 29 10 .63 F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 8.163E-3 R16 38 40 3.874K D5 30 99 DX V4 30 40 .77 D6 50 31 DX V5 40 31 .77 *Fp1=.046 Hz C3 29 39 50P R6 39 40 1K R17 40 41 83.6 * ***************MODELS USED************** * .MODEL DA D(IS=3E-15) .MODEL DB D(IS=2E-15) .MODEL DX D(IS=1E-15) .MODEL MOSFET PMOS(VTO=-2.35 KP=2.0884E-4) .ENDS *////////////////////////////////////////////////////////// *LMC6044/A CMOS Quad Micropower OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC6044 1 2 99 50 41 * *Features: *Operates from single supply *Rail-to-rail output swing *Ultra low input current = 2fA *Slew rate = .02V/uS *Low supply current = 14uA * *NOTE: Model is for single device only and simulated * supply current is 1/4 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 1U M1 5 2 4 99 MOSFET R3 5 50 69.198K M2 6 7 4 99 MOSFET R4 6 50 69.198K *Fp2=100 KHz C4 5 6 11.5P CI1 1 0 2P CI2 2 0 2P DP1 1 99 DA DP2 50 1 DX DP3 2 99 DX DP4 50 2 DB G0 98 9 6 5 36.128E-3 R0 98 9 1K *For accurate Ib , set GMIN<=1E-17 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 11U *^Quiescent current EOS 7 1 POLY(1) 16 49 1E-3 1 *Offset voltage.........^ R8 99 49 1.25MEG R9 49 50 1.25MEG * ***************POLE STAGE*************** * *Fp=2.7 MHz G2 98 13 9 49 1E-3 R10 98 13 1K C5 98 13 58.8463P * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 13 49 1E-3 R12 98 15 1K C6 98 15 11.967P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=800 Hz G4 98 16 POLY(2) 1 49 2 49 0 8.891397E-8 8.891397E-8 L2 98 17 198.944M R13 17 16 1K * **************OUTPUT STAGE************** * EH 99 98 99 49 1 G1 98 29 15 49 4.1265E-7 R5 98 29 2.12115G D1 8 99 DX V2 8 29 .63 D2 50 10 DX V3 29 10 .63 F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 8.163E-3 R16 38 40 3.874K D5 30 99 DX V4 30 40 .77 D6 50 31 DX V5 40 31 .77 *Fp1=.046 Hz C3 29 39 50P R6 39 40 1K R17 40 41 83.6 * ***************MODELS USED************** * .MODEL DA D(IS=3E-15) .MODEL DB D(IS=2E-15) .MODEL DX D(IS=1E-15) .MODEL MOSFET PMOS(VTO=-2.35 KP=2.0884E-4) .ENDS *////////////////////////////////////////////////////////// *LMC6062 Precision CMOS Dual Micropower OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC6062 1 2 99 50 40 * *Features: *Operates from single or dual supplies *Rail-to-rail output swing *Ultra low input current = 10fA *Ultra low input offset voltage = 100uV *High voltage gain = 140dB * *NOTE: Model is for single device only and simulated * supply current is 1/2 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 1U M1 5 2 4 99 MOSFET R3 5 50 77.26K M2 6 7 4 99 MOSFET R4 6 50 77.26K *Fp2=300 KHz C4 5 6 3.433P G0 98 9 6 5 54.916E-3 R0 98 9 1K DP1 1 99 DA DP2 50 1 DB DP3 2 99 DB DP4 50 2 DA *For accurate Ib , set GMIN<=1E-16 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 13U *^Quiescent current EOS 7 1 POLY(1) 16 49 100E-6 1 *Offset voltage.........^ R8 99 49 1.25MEG R9 49 50 1.25MEG * ***************POLE STAGE*************** * *Fp=370 KHz G3 98 15 9 49 1E-3 R12 98 15 1K C5 98 15 430.15P * ***************POLE STAGE*************** * *Fp=6.8 MHz G5 98 18 15 49 1E-3 R14 98 18 1K C6 98 18 23.405P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=1 KHz G4 98 16 POLY(2) 1 49 2 49 0 2.812E-8 2.812E-8 L2 98 17 159.2M R13 17 16 1K * **************SECOND STAGE************** * EH 99 98 99 49 1 G1 98 29 18 49 5.5611E-7 R5 98 29 65.33G V2 99 8 1.0 D1 29 8 DX D2 10 29 DX V3 10 50 1.0 * **************OUTPUT STAGE************** * F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 12.5E-3 R16 38 40 119.698 V4 30 40 .77 D5 30 99 DX V5 40 31 .77 D6 50 31 DX *Fp1=.034 Hz C3 29 39 28.57P R6 39 40 1K * ***************MODELS USED************** * .MODEL DA D(IS=2E-14) .MODEL DB D(IS=1E-14) .MODEL DX D(IS=1E-14) .MODEL MOSFET PMOS(VTO=-2.35 KP=1.6753E-4) .ENDS *////////////////////////////////////////////////////////// *LMC6082 Precision CMOS Dual Micropower OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC6082 1 2 99 50 40 * *Features: *Operates from single or dual supplies *Rail-to-rail output swing *Ultra low input current = 10fA *Ultra low input offset voltage = 100uV *High voltage gain = 140dB * *NOTE: Model is for single device only and simulated * supply current is 1/2 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 20U M1 5 2 4 99 MOSFET R3 5 50 11.477K M2 6 7 4 99 MOSFET R4 6 50 11.477K *Fp2=3 MHz C4 5 6 2.311P G0 98 9 6 5 18.483E-3 R0 98 9 1K DP1 1 99 DA DP2 50 1 DB DP3 2 99 DB DP4 50 2 DA *For accurate Ib , set GMIN<=1E-16 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 380U *^Quiescent current EOS 7 1 POLY(1) 16 49 150E-6 1 *Offset voltage.........^ R8 99 49 50K R9 49 50 50K * ***************POLE STAGE*************** * *Fp=4.5 MHz G3 98 15 9 49 1E-3 R12 98 15 1K C5 98 15 35.368P * ***************POLE STAGE*************** * *Fp=13.3 MHz G5 98 18 15 49 1E-3 R14 98 18 1K C6 98 18 11.966P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=1 KHz G4 98 16 POLY(2) 1 49 2 49 0 2.812E-8 2.812E-8 L2 98 17 26.526M R13 17 16 1K * **************SECOND STAGE************** * EH 99 98 99 49 1 G1 98 29 18 49 9.14357E-6 R5 98 29 3.0699G V2 99 8 1.3 D1 29 8 DX D2 10 29 DX V3 10 50 1.3 * **************OUTPUT STAGE************** * F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 13.889E-3 R16 38 40 193.79 V4 30 40 .77 D5 30 99 DX V5 40 31 .77 D6 50 31 DX *Fp1=1.053 Hz C3 29 39 13.333P R6 39 40 1K * ***************MODELS USED************** * .MODEL DA D(IS=2E-14) .MODEL DB D(IS=1E-14) .MODEL DX D(IS=1E-14) .MODEL MOSFET PMOS(VTO=-2.35 KP=3.7956E-4) .ENDS *////////////////////////////////////////////////////////// *LMC6482 CMOS Dual OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC6482 1 2 99 50 40 * *Features: *Operates from single or dual supplies *Rail-to-rail input and output swing *Ultra low input current = 10fA *Slew rate = 1.2V/uS * *NOTE: Model is for single device only and simulated * supply current is 1/2 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 17U M1 5 2 4 99 MOSFET R3 5 50 5.651K M2 6 7 4 99 MOSFET R4 6 50 5.651K *Fp2=5.9 MHz C4 5 6 2.3868P G0 98 9 6 5 4.4165E-2 R0 98 9 1K DP1 1 99 DA DP2 50 1 DB DP3 2 99 DB DP4 50 2 DA *For accurate Ib , set GMIN<=1E-16 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 420.5U *^Quiescent current EOS 7 1 POLY(1) 16 49 .5E-3 1 *Offset voltage..........^ R8 99 49 40K R9 49 50 40K * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 9 49 1E-3 R12 98 15 1K C5 98 15 11.967P * ************POLE/ZERO STAGE************* * *Fp=600 KHz, Fz= 1.4MHz G5 98 18 15 49 1E-3 R14 98 18 1K R15 98 19 750 C6 19 18 151.58P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=20 KHz G4 98 16 POLY(2) 1 49 2 49 0 2.812E-8 2.812E-8 L2 98 17 7.958M R13 17 16 1K * **************SECOND STAGE************** * EH 99 98 99 49 1 G1 98 29 18 49 5.6667E-6 R5 98 29 100.37MEG V2 99 8 1.56 D1 29 8 DX D2 10 29 DX V3 10 50 1.56 * **************OUTPUT STAGE************** * F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 16.667E-3 R16 38 40 2.3886K V4 30 40 .77 D5 30 99 DX V5 40 31 .77 D6 50 31 DX *Fp1=2.343 Hz C3 29 39 17P R6 39 40 1K * ***************MODELS USED************** * .MODEL DA D(IS=2E-14) .MODEL DB D(IS=1E-14) .MODEL DX D(IS=1E-14) .MODEL MOSFET PMOS(VTO=0 KP=1.842E-3) .ENDS *////////////////////////////////////////////////////////// *LMC6484 CMOS Quad OP-AMP MACRO-MODEL *////////////////////////////////////////////////////////// * * connections: non-inverting input * | inverting input * | | positive power supply * | | | negative power supply * | | | | output * | | | | | * | | | | | .SUBCKT LMC6484 1 2 99 50 40 * *Features: *Operates from single or dual supplies *Rail-to-rail input and output swing *Ultra low input current = 10fA *Slew rate = 1.2V/uS * *NOTE: Model is for single device only and simulated * supply current is 1/4 of total device current. * Noise is not modeled. * Asymmetrical gain is not modeled. * *****************INPUT STAGE************** * I1 99 4 17U M1 5 2 4 99 MOSFET R3 5 50 5.651K M2 6 7 4 99 MOSFET R4 6 50 5.651K *Fp2=5.9 MHz C4 5 6 2.3868P G0 98 9 6 5 4.4165E-2 R0 98 9 1K DP1 1 99 DA DP2 50 1 DB DP3 2 99 DB DP4 50 2 DA *For accurate Ib , set GMIN<=1E-16 on .OPTIONS line. * ***********COMMON MODE EFFECT*********** * I2 99 50 420.5U *^Quiescent current EOS 7 1 POLY(1) 16 49 .5E-3 1 *Offset voltage..........^ R8 99 49 40K R9 49 50 40K * ***************POLE STAGE*************** * *Fp=13.3 MHz G3 98 15 9 49 1E-3 R12 98 15 1K C5 98 15 11.967P * ************POLE/ZERO STAGE************* * *Fp=600 KHz, Fz= 1.4MHz G5 98 18 15 49 1E-3 R14 98 18 1K R15 98 19 750 C6 19 18 151.58P * *********COMMON-MODE ZERO STAGE********* * *Fpcm=20 KHz G4 98 16 POLY(2) 1 49 2 49 0 2.812E-8 2.812E-8 L2 98 17 7.958M R13 17 16 1K * **************SECOND STAGE************** * EH 99 98 99 49 1 G1 98 29 18 49 5.6667E-6 R5 98 29 100.37MEG V2 99 8 1.56 D1 29 8 DX D2 10 29 DX V3 10 50 1.56 * **************OUTPUT STAGE************** * F6 99 50 VA7 1 *^Dynamic supply current F5 99 35 VA8 1 D3 36 35 DX VA7 99 36 0 D4 35 99 DX E1 99 37 99 49 1 VA8 37 38 0 G6 38 40 49 29 16.667E-3 R16 38 40 2.3886K V4 30 40 .77 D5 30 99 DX V5 40 31 .77 D6 50 31 DX *Fp1=2.343 Hz C3 29 39 17P R6 39 40 1K * ***************MODELS USED************** * .MODEL DA D(IS=2E-14) .MODEL DB D(IS=1E-14) .MODEL DX D(IS=1E-14) .MODEL MOSFET PMOS(VTO=0 KP=1.842E-3) .ENDS